Modern information processing systems are becoming increasingly complex. They are composed of a central system, occupying a predetermined geographical position, around which secondary systems, located at different geographical regions from that occupied by the central system, gravitate. The structure of a system, whether it is central or secondary, is generally made up of at least one central unit, also called a host, connected to various peripherals, which include mass magnetic memories, such as, for example, rotating disk memories. The role of these mass magnetic memories, in particular disk memories, is to store the information intended to be processed with the information processing system overall, i.e., the system composed of central and secondary systems, when a user located at any geographical place requests it to do so.
Rotary magnetic disk memories have for a long time remained widely used, because they make it possible to store very large quantities of information and access it relatively rapidly. Furthermore, technological progress, particularly in the field of magnetic recording media and recording heads, has made it possible to make disk memories with capacities on the order of half a gigabyte, in increasingly reduced physical volumes. Currently, disk memories have been developed whose disk diameter is on the order of 2.5 inches. It may be imagined that in the coming years, the capacity of such memories, whose physical dimension is on the order of the size of a package of cigarettes, may achieve 1 gigabyte.
Information processing systems process very large volumes of data which requires the use of an ever increasing number of mass memories in which these data must be stored before being processed by the central processors thereof.
As a result, management of such systems by a single central unit is extremely tedious.
Accordingly, one is lead to decentralizing management among a plurality of subsystems, each managing one portion of the elements of the system, in particular the peripherals.
To do so, mass memory peripheral subsystems, instead of the central unit, manage not only the transfer of data from the central unit to the mass memories but also the reading and writing of information within these mass memories.
FIGS. 1-3 show exemplary embodiments of such systems.
Turning first to FIG. 1:
The subsystem SSM.sub.1 includes from one to five identical assemblies E.sub.1 -E.sub.5.
The assembly E.sub.1 is composed of an adapter device DA.sub.1, which is tasked with connecting a set of a maximum of 12 disk memories, i.e., disk memories 101-112, to one or more hosts H.sub.1, . . . , H.sub.n. The twelve memories are connected to one another by the same linking chain 1A. The system of connecting the disk memories over the link 1A is such that if one of them is disconnected, all the others continue to function.
The assemblies E.sub.2 -E.sub.5 have a structure identical to the assembly E.sub.1. Hence the assembly E.sub.2 is composed of an adapter device DA.sub.2 and 12 disk memories 201-212, connected to the same linking chain 2A. The same is true for the other assemblies E.sub.3 -E.sub.5, the latter being composed of an adapter device DA.sub.5 associated with 12 disk memories 501-512 connected to the same chain 5A.
Hence to assure maximum operating reliability of the assemblies E.sub.1 -E.sub.5, two identical power supplies AL.sub.1 and AL.sub.2 and a backup battery BAT.sub.1 are associated with the subsystem SSM.sub.1. This means that if one of the two power supplies AL.sub.1 and AL.sub.2 fails, the other replaces it, or that if the sector power supply is broken, then the battery BAT.sub.1 continues to assure the electrical supply to each of the subassemblies E.sub.1 -E.sub.5 for a predetermined, programmable period of time.
This power supply redundancy and the battery backup are generally optional but are required when disk memories function in the known "fast write" mode. One example of the fast write mode is given in French Patent Application 89 1711, filed by the present applicant on Dec. 22, 1989. SSM.sub.1 includes a fast write processor FWP, which continuously oversees the operating state of AL.sub.1, AL.sub.2, BAT.sub.1 and depending on this state either does or does not authorize the "fast write" mode or the normal writing mode.
Turning to FIG. 2, a second mass memory subsystem SSM.sub.2 of the standard RAID (a commonly used acronym for Redundant Array of Inexpensive Disks) type is shown.
This system includes a first controller CT.sub.1, connected to at least one central host H1 (or to host H.sub.1, . . . , H.sub.n) and a second controller CT.sub.2 connected to at least one central host H.sub.2 (or hosts H.sub.1, . . . , H.sub.n). The controller CT.sub.1 may also be connected via an RS-232-type link to a maintenance/configuration console or to a modem, while the second controller CT.sub.2 is connected via an RS-232 link of the same type as the foregoing to a maintenance/configuration console or to a modem. It will be recalled that the RS-232-type link is standardized. Each of the two controllers CT.sub.1 and CT.sub.2 is connected to five assemblies E.sub.1 -E.sub.5, which are identical to the assemblies E.sub.1 -E.sub.5 of FIG. 1. The role of the adapter devices DA.sub.1 -DA.sub.5 is identical to that of the adapter devices in FIG. 1. It is, therefore, evident that the system SSM.sub.2 is redundant, which means that if one of the two controllers fails, the second will support the entire task of the subsystem. As in FIG. 1, the subsystem SSM.sub.2 includes two power supplies AL.sub.1 and AL.sub.2 as well as a backup battery BAT.sub.1. It is also clear that the subsystem SSM.sub.2 is a protected system that is reliable because of the redundant architecture, the doubling of the power supplies, and the possibility (thanks to the RAID function) of changing any of the disk memories of any of the assemblies E.sub.1 -E.sub.5 without interrupting the function of the others. In other words, the subsystem SSM.sub.2 has total availability.
Turning now to FIG. 3, a third example of a mass memory RAID subsystem is shown, that is, SSM.sub.3, whose novel structure is proposed by the present applicant. This subsystem includes two host adapters HA.sub.1 and HA.sub.2, which are connected to two central hosts H.sub.1 and H.sub.2 (or more central hosts H.sub.1, . . . , H.sub.n), whose role is to manage the exchange of data between one of the two central hosts H.sub.1 and H.sub.2 and all the adapter devices of the subsystem. Each of these host adapters is connected in the following manner to six subassemblies E.sub.1 -E.sub.6, which are completely identical in their mechanical structure to the assemblies of the same name in FIGS. 1 and 2. The first assembly E.sub.1 is composed of the adapter device DA.sub.1 associated with the disk memories 101-112 connected to the linking chain 1A, and so forth, up to the assembly E6, composed of the adapter device DA.sub.6 associated with disk memories 601-612 connected to the linking chain 6A. The structure that connects the host adapters HA.sub.1 and HA.sub.2 to the six subassemblies E.sub.1 to E.sub.6 is a ring structure. This ring is identified by the symbol AN. Thus the first host adapter HA.sub.1 is connected on the one hand, by way of the link L.sub.1 to the device DA.sub.1 of the assembly E.sub.1. DA.sub.1 is connected by the link L.sub.2 to DA.sub.2, which is connected by the link L.sub.3 to the adapter device DA.sub.3, which in turn is connected by the link L.sub.5 to the second host adapter HA.sub.2. The first host adapter HA.sub.1 is also connected by the link L.sub.4 to the adapter device DA.sub.4 of the assembly E.sub.4. DA.sub.4 is in turn connected by the link L.sub.6 to the adapter device DA.sub.5, which in turn is connected by the link L.sub.7 to the adapter device DA.sub.6 of the assembly EA.sub.6. This last adapter device is connected by the link L.sub.8 to the second host adapter HA.sub.2. It is thus seen that a ring structure AN is again achieved that connects the two host adapters HA.sub.1 and HA.sub.2 to the various adapter devices DA.sub.1 to DA.sub.6. As in subsystems SSM.sub.1 and SSM.sub.2, subsystem SSM.sub.3 includes two electrical power supplies AL.sub.1 and AL.sub.2, associated with a backup battery BAT.sub.1. The subsystem SSM.sub.3 has the same advantages as the subsystem SSM.sub.2 in terms of availability and backup protection of the data. However, it has much greater power and sophistication.